Difference between revisions of "PIC24 clock setup"
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(Created page with "<pre> ew. config word FOSCSEL selects which oscillator. each oscillator option can be with or without PLL (which multiplies by 4) The builtin RC oscillator is 8mhz, so FNOSC_…") |
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Latest revision as of 08:40, 17 January 2012
ew. config word FOSCSEL selects which oscillator. each oscillator option can be with or without PLL (which multiplies by 4) The builtin RC oscillator is 8mhz, so FNOSC_FRC is 8mhz, and FNOSC_FRCPLL is 32mhz. THEN, there's a postscaler. CLKDIVbits.RCDIV sets the divide-by. 0 means don't. NOTE: The default setting of the postscaler is DIVIDE BY TWO. If you don't want it to halve the clock freq, you have to set CLKDIVbits.RCDIV=0 early in the program. THEN, whatever the output of all the above, is divided by two. For example _FOSCSEL(FNOSC_FRC) CLKDIVbits.RCDIV = 0; gives the builtin 8mhz oscillator, not divided by a postscaler, and finally divided by two = 4MHz. _FOSCSEL(FNOSC_FRCPLL) gives builtin 8mhz, times 4 (pll) = 32MHz, divided by 2 = 16 MHz. UART BAUD RATE SETTINGS. Builtin RC oscillator @ 8MHZ, PLL enabled, CLKDIV=0 = system clock at 16MHz _FOSCSEL(FNOSC_FRCPLL) CLKDIVbits.RCDIV = 0; U1MODEbits.BRGH = 1; 9600bps: U1BRG=416 19200bps: U1BRG=207 38400bps: U1BRG=103 57600bps: U1BRG=70 115200bps: U1BRG=34